Display device and carrier panel

ABSTRACT

A display device includes a substrate including a first region, a second region, and a bending region between the first region and the second region, a protective substrate disposed below the substrate in the first region, the second region, and the bending region, a cushion layer disposed below the protective substrate in the first region and the second region, a pixel layer disposed on the substrate in the second region, and a drive chip disposed on the substrate in the first region. The substrate is bent at the bending region such that the first region overlaps the second region.

CROSS REFERENCE TO RELATED APPLICATION(S)

This is a continuation application of U.S. patent application Ser. No.17/830,003, filed Jun. 1, 2022 (now pending), the disclosure of which isincorporated herein by reference in its entirety. U.S. patentapplication Ser. No. 17/830,003 is a continuation application of U.S.patent application Ser. No. 17/744,046, filed May 13, 2022 (nowpending), the disclosure of which is incorporated herein by reference inits entirety. U.S. patent application Ser. No. 17/744,046 is adivisional application of U.S. patent application Ser. No. 16/991,558,filed Aug. 12, 2020, now U.S. Pat. No. 11,355,718, issued Jun. 7, 2022,the disclosure of which is herein by reference in its entirety. U.S.patent application Ser. No. 16/991,558 claims priority to and benefitsof Korean Patent Application No. 10-2019-0116924 under 35 U.S.C. § 119,filed Sep. 23, 2019, in the Korean Intellectual Property Office, thedisclosure of which is incorporated herein by reference in its entiretyfor all purposes.

BACKGROUND 1. Technical Field

The disclosure relates to a display device in which a bending region ofa display panel may be more easily bent and the thickness of the displaypanel may be reduced, and a carrier panel.

2. Description of the Related Art

A display device that provides an image to a user, such as a monitor, aniPad, a smartphone, and a tablet PC, includes a display panel thatdisplays the image. Various types of display panels are being developed,such as liquid crystal display panels, organic light emitting displaypanels, electrowetting display panels, and electrophoretic displaypanels.

As part of the technological development of display devices, displaydevices including flexible display panels are being developed. A displaypanel may include pixels for displaying an image and a drive chip fordriving the pixels. The pixels may be arranged in a display region ofthe display panel and the drive chip may be disposed in a non-displayregion of the display panel surrounding the display region. A bendingportion may be defined between the drive chip and the display region,and the bending portion may be bent, so that the drive chip may bedisposed below the display panel.

It is to be understood that this background of the technology sectionis, in part, intended to provide useful background for understanding thetechnology. However, this background of the technology section may alsoinclude ideas, concepts, or recognitions that were not part of what wasknown or appreciated by those skilled in the pertinent art prior to acorresponding effective filing date of the subject matter disclosed.

SUMMARY

The disclosure provides a display device in which a bending region of adisplay panel may be more easily bent and the thickness of the displaypanel may be reduced, and a carrier panel.

An embodiment of the disclosure may provide a display device that mayinclude a substrate including a first region, a second region, and abending region between the first region and the second region, aprotective substrate disposed below the substrate in the first region,the second region, and the bending region, a cushion layer disposedbelow the protective substrate in the first region and the secondregion, a pixel layer disposed on the substrate in the second region,and a drive chip disposed on the substrate in the first region. Thesubstrate may be bent at the bending region such that the first regionmay overlap the second region.

The protective substrate has a thickness smaller than a thicknesses ofeach of the substrate and the cushion layer. The thickness of theprotective substrate may be in a range of about 5 μm to about 20 μm.

The protective substrate may include a polyimide. The polyimide may becolored.

The display device may further include a first adhesive layer disposedbetween the substrate and the protective substrate, and a secondadhesive layer disposed between the protective substrate and the cushionlayer.

The cushion layer and the second adhesive layer may be disposed at anarea excluding the bending region.

The second region may include a display region, and a non-display regionadjacent to the display region. The pixel layer is disposed on thesubstrate in the display region.

The display device may further include a thin film encapsulation layerdisposed on the substrate in the second region and covering the pixellayer, an input sensing part disposed on the thin film encapsulationlayer, and a window disposed on the input sensing part and extendingover the bending region.

The display device may further include a protective layer disposed onthe substrate in the bending region and extending to the drive chip.

In an embodiment of the disclosure, a display device may include asubstrate including a first region, a second region, and a bendingregion between the first region and the second region, a protectivesubstrate disposed below the substrate in the first region, a cushionlayer disposed below the protective substrate in the first region andbelow the substrate in the second region, a pixel layer disposed on thesubstrate in the second region; and a drive chip disposed on thesubstrate in the first region. The substrate may be bent at the bendingregion such that the first region overlaps the second region.

The protective substrate may have a thickness smaller than a thicknessesof each of the substrate and the cushion layer. The protective substratemay include a colored polyimide.

The protective substrate may be disposed at an area excluding thebending region and the second region, and the cushion layer may bedisposed at an area excluding the bending region.

The display device may further include a first adhesive layer disposedbetween the substrate and the protective substrate in the first region,and a second adhesive layer disposed between the protective substrateand the cushion layer in the first region and between the substrate andthe cushion layer in the second region.

The second region may include a display region, and a non-display regionadjacent to the display region. The pixel layer may be disposed on thesubstrate in the display region.

The display device may further include a thin film encapsulation layerdisposed on the substrate in the second region and covering the pixellayer, an input sensing part disposed on the thin film encapsulationlayer, and a window disposed on the input sensing part and extendingover the bending region.

The display device may further comprise a protective layer disposed onthe substrate in the bending region and extending to the drive chip.

In an embodiment of the disclosure, a carrier panel may include asubstrate including a first region, a second region, and a bendingregion disposed between the first region and the second region, a pixellayer disposed on the substrate, a protective substrate disposed belowthe substrate, a first adhesive layer disposed between the substrate andthe protective substrate, a carrier film disposed below the protectivesubstrate, and a dummy adhesive layer disposed between the protectivesubstrate and the carrier film. An adhesion layer of the dummy adhesivelayer may be weaker than an adhesion of the first adhesive layer. Theprotective substrate may have a thickness smaller than a thicknesses ofeach of the substrate and the carrier film.

The protective substrate and the first adhesive layer may be disposed atan area including the first region and excluding the second region andthe bending region, and the dummy adhesive layer may be disposed betweenthe protective substrate and the carrier film in the first region, andis disposed between the substrate and the carrier film in the secondregion and the bending region.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are included to provide a furtherunderstanding of the disclosure, and are incorporated in and constitutea part of this specification. The drawings illustrate embodiments of thedisclosure and, together with the description, serve to describeprinciples of the disclosure. In the drawings:

FIG. 1 is a schematic plan view of a display device according to anembodiment;

FIG. 2 is a schematic cross-sectional view taken along line I-I′illustrated in FIG. 1 ;

FIG. 3 schematically illustrates an equivalent circuit of a pixelarranged in the pixel layer illustrated in FIG. 2 ;

FIG. 4 is a schematic cross-sectional view of a portion corresponding toa light emitting element illustrated in FIG. 3 ;

FIG. 5 schematically illustrates a bent state of a bending regionillustrated in FIG. 2 ;

FIG. 6 schematically illustrates a carrier panel according to anembodiment;

FIGS. 7 and 8 are schematic views for describing a manufacturing processof the display device using the carrier panel illustrated in FIG. 6 ;

FIG. 9 is a schematic cross-sectional view of a display device accordingto another embodiment;

FIG. 10 schematically illustrates a bent state of the bending regionillustrated in FIG. 9 ;

FIG. 11 schematically illustrates a carrier panel according to anotherembodiment; and

FIGS. 12 and 13 are schematic views for describing a manufacturingprocess of the display device using the carrier panel illustrated inFIG. 11 .

DETAILED DESCRIPTION OF THE EMBODIMENTS

Hereinafter, embodiments will be explained in detail with reference tothe accompanying drawings. Like reference numerals refer to likeelements throughout this specification. In the figures, the thicknesses,ratios and dimensions of elements may be exaggerated for effectivedescription of the technical contents.

It will be understood that when an element or layer is referred to asbeing “on”, “connected to”, “coupled to”, “below”, or the like withrespect to another element or layer, it can be directly on, connectedto, coupled to, below, or the like with respect to the other element orlayer, or intervening elements or layers may be present.

As used herein, the term “and/or” includes any and all combinations ofone or more of the associated listed items. For example, “A and/or B”may be understood to mean “A, B, or A and B.” The terms “and” and “or”may be used in the conjunctive or disjunctive sense and may beunderstood to be equivalent to “and/or.”

It will be understood that, although the terms “first,” “second,” etc.may be used herein to describe various elements, components, regions,layers and/or sections, these elements, components, regions, layersand/or sections should not be limited by these terms. These terms areonly used to distinguish one element, component, region, layer orsection from another element, component, region, layer or section. Thus,a “first” element, component, region, layer or section discussed belowcould be termed a “second” element, component, region, layer or sectionwithout departing from the teachings of the invention. As used herein,the singular forms, “a”, “an” and “the” are intended to include theplural forms as well, unless the context clearly indicates otherwise.

Spatially relative terms, such as “beneath”, “below”, “lower”, “above”,and “upper”, may be used herein for ease of description to describe oneelement or feature's relationship to another element(s) or feature(s) asillustrated in the figures. It will be understood that the spatiallyrelative terms are intended to encompass different orientations of thedevice in use or operation in addition to the orientation depicted inthe figures.

The term “overlap” may include layer, stack, face or facing, extendingover, covering or partly covering or any other suitable term as would beappreciated and understood by those of ordinary skill in the art.

Unless otherwise defined, all terms (including technical and scientificterms) used herein have the same meaning as commonly understood by oneof ordinary skill in the art to which this invention belongs. It will befurther understood that terms, such as those defined in commonly useddictionaries, should be interpreted as having a meaning that isconsistent with their meaning in the context of the relevant art andwill not be interpreted in an idealized or overly formal sense unlessexpressly so defined herein.

It will be further understood that the terms “include” or “have”, whenused in this specification, specify the presence of stated features,integers, steps, operations, elements, and/or components, but do notpreclude the presence or addition of one or more other features,integers, steps, operations, elements, components, and/or groupsthereof.

FIG. 1 is a schematic plan view of a display device DD according to anembodiment of the disclosure.

Referring to FIG. 1 , the display device DD may include a display panelDP, a scan driver SDV, a data driver DDV, and an emission driver EDV.

The display panel DP may be a flexible display panel. For example, thedisplay panel DP may include electronic elements disposed on a flexiblesubstrate. The display panel DP may have a rectangular shape having longsides in a first direction DR1 and short sides in a second directionDR2. Hereinafter, a direction perpendicular to a plane defined by thefirst and second directions DR1 and DR2 may be defined as a thirddirection DR3.

The display panel DP may include a first region A1, a second region A2,and a bending region BA between the first region A1 and the secondregion A2. The bending region BA may extend in the second direction DR2,and the first region A1, the bending region BA, and the second region A2may be arranged in the first direction DR1.

The second region A2 may include a display region DA and a non-displayregion NDA around the display region DA. The non-display region NDA maysurround the display region DA. The display region DA may be a region inwhich an image may be displayed, and the non-display region NDA may be aregion in which an image may not be displayed. The first region A1 andthe bending region BA may be regions in which an image may not bedisplayed. The regions in which an image may not be displayed may bedefined as a bezel region.

The display panel DP may include pixels PX, scan lines SL1 to SLm, datalines DL1 to DLn, and light emission lines EL1 to ELm. where m and n maybe natural numbers. Although the pixels PX may be arranged in a matrixform, the pixels PX are not limited thereto and may be arranged in avariety of forms. The pixels PX may be arranged in the display regionDA, and may be connected to the scan lines SL1 to SLm, the data linesDL1 to DLn, and the light emission lines EL1 to ELm.

The scan driver SDV and the emission driver EDV may be disposed in thenon-display region NDA, and the data driver DDV may be disposed in thefirst region A1. The scan driver SDV and the emission driver EDV may berespectively disposed in two portions of the non-display region NDAadjacent to the long sides of the display panel DP. The data driver DDVmay be manufactured in the form of an integrated circuit chip anddisposed in the first region A1.

The scan lines SL1 to SLm may extend in the second direction DR2 to beconnected to the scan driver SDV. The data lines DL1 to DLn may extendin the first direction DR1, and may be connected to the data driver DDVthrough the bending region BA. The light emission lines EL1 to ELm mayextend in the second direction DR2 to be connected to the emissiondriver EDV.

The scan driver SDV may generate scan signals, and the scan signals maybe applied to the pixels PX through the scan lines SL1 to SLm. The scansignals may be sequentially applied to the pixels PX. The data driverDDV may generate data voltages, and the data voltages may be applied tothe pixels PX through the data lines DL1 to DLn. The emission driver EDVmay generate light emission signals, and the light emission signals maybe applied to the pixels PX through the light emission lines EL1 to ELm.

Although not illustrated, a timing controller (not illustrated) forcontrolling operations of the scan driver SDV, the data driver DDV, andthe emission driver EDV may be included in the display device DD.

The timing controller may generate a scan control signal, a data controlsignal, and a light emission control signal in response to controlsignals received from the outside. The timing controller may receiveimage signals from the outside, and convert a data format of the imagesignals according to an interface specification with the data driver DDVto provide the image signals having the converted data format to thedata driver DDV.

The scan driver SDV may generate the scan signals in response to thescan control signal, and the emission driver EDV may generate the lightemission signals in response to the light emission control signal. Thedata driver DDV may receive the image signals having the converted dataformat, and generate the data voltages corresponding to the imagesignals in response to the data control signal.

The pixels PX may receive the data voltages in response to the scansignals. The pixels PX may display an image by emitting light beamshaving luminance levels corresponding to the data voltages in responseto the light emission signals. The light emission time of the pixels PXmay be controlled by the light emission signals.

FIG. 2 is a schematic cross-sectional view taken along line I-I′illustrated in FIG. 1 .

Referring to FIG. 2 , the display device DD may include the displaypanel DP, an input sensing part ISP disposed on the display panel DP, awindow WIN disposed on the input sensing part ISP, and a cushion layerCSL disposed below the display panel DP.

The display panel DP according to an embodiment of the disclosure may bea light emitting display panel and is not particularly limited. Forexample, the display panel DP may be an organic light emitting displaypanel or a quantum dot light emitting display panel. A light emittinglayer of an organic light emitting display panel may include an organiclight emitting material. A light emitting layer of a quantum dot lightemitting display panel may include a quantum dot, a quantum rod, or thelike. Hereinafter, the display panel DP is described as an organic lightemitting display panel.

The display panel DP may include a substrate SUB, a pixel layer PXLdisposed on the substrate SUB, a thin film encapsulation layer TFEdisposed on the substrate SUB so as to cover the pixel layer PXL, and aprotective substrate PTS disposed below the substrate SUB. The substrateSUB may be a transparent substrate and may include a flexible plasticsubstrate. For example, the substrate SUB may include a transparentpolyimide (PI).

The substrate SUB, like the display panel DP, may include a first regionA1, a second region A2, and a bending region BA between the first regionA1 and the second region A2. The bending region BA may extend in thesecond direction DR2, and the first region A1, the bending region BA,and the second region A2 may be arranged in the first direction DR1. Thesecond region A2 may include a display region DA and a non-displayregion NDA around the display region DA.

The pixel layer PXL may be disposed on the substrate SUB in the displayregion DA. Th pixels PX illustrated in FIG. 1 may be arranged in thepixel layer PXL.

The data driver DDV may be disposed on the substrate SUB in the firstregion A1. The data driver DDV may be defined as a drive chip DDVhereinafter. A protective layer PTL may be disposed on the substrate SUBin the bending region BA. The protective layer PTL may be disposedadjacent to the thin film encapsulation layer TFE and may extend to thedrive chip DDV. The protective layer PTL may be disposed on wiresextending from the pixel layer PXL to the data driver DDV and thus mayprotect the wires.

The thin film encapsulation layer TFE may be disposed on the substrateSUB in the second region A2 so as to cover the pixel layer PXL. The thinfilm encapsulation layer TFE may include at least two inorganic layersand an organic layer disposed between the inorganic layers. Theinorganic layers may include an inorganic material and may protect thepixel layer PXL from moisture and/or oxygen. The organic layer mayinclude an organic material and may protect the pixel layer PXL fromforeign matter such as dust particles.

The input sensing part ISP may be disposed on the thin filmencapsulation layer TFE. The input sensing part ISP may sense anexternal input such as a user's touch, convert the external input intoan input signal, and provide the input signal to the display panel DP.The input sensing part ISP may include sensors (not illustrated) forsensing the external input. The sensors may sense the external input ina capacitive method. The display panel DP may receive the input signalfrom the input sensing part ISP and generate an image corresponding tothe input signal.

The window WIN may protect the display panel DP and the input sensingpart ISP from scratches and impacts from the outside. Although notillustrated, an adhesive may attach the window WIN to the input sensingpart ISP. The adhesive may include an optical clear adhesive. The imagegenerated in the display panel DP may be provided to a user through thewindow WIN.

The protective substrate PTS may protect a lower portion of the displaypanel DP. The protective substrate PTS may include a flexible plasticsubstrate. For example, the protective substrate PTS may include acolored polyimide. A colored polyimide may be more affordable than atransparent polyimide. By using an affordable colored polyimide as theprotective substrate PTS, the manufacturing cost of the display deviceDD may be lowered.

A polyimide may have a smaller modulus than polyethylene terephthalate(PET). Thus, a protective substrate PTS including a polyimide may bemore easily bent than a protective substrate including polyethyleneterephthalate.

The cushion layer CSL may protect the display panel DP by absorbing anexternal impact applied to the lower portion of the display panel DP.The cushion layer CSL may include a foam sheet having elastic force. Thecushion layer CSL may be disposed below the protective substrate PTS inthe first and second regions A1 and A2. The cushion layer CSL may not bedisposed in the bending region BA. For example, the cushion layer CSLmay be disposed at an area including the first and second regions A1 andA2 and excluding the bending region BA.

The protective substrate PTS may have a thickness smaller than thethicknesses of the substrate SUB and the cushion layer CSL. Theprotective substrate PTS may have a thickness of about 5 μm to about 20μm.

A first adhesive layer AD1 may be disposed between the substrate SUB andthe protective substrate PTS. The protective substrate PTS may beattached to the substrate SUB by the first adhesive layer AD1. Althoughthe first adhesive layer AD1 may include a pressure sensitive adhesive,the first adhesive layer AD1 is not limited thereto and may includevarious adhesives.

A second adhesive layer AD2 may be disposed between the protectivesubstrate PTS and the cushion layer CSL. The cushion layer CSL may beattached to the protective substrate PTS by the second adhesive layerAD2. Although the second adhesive layer AD2 may include a pressuresensitive adhesive, the second adhesive layer AD2 is not limited theretoand may include various adhesives. The second adhesive layer AD2 may notbe disposed in the bending region BA, but may be disposed in the firstand second regions A1 and A2. That is, the second adhesive layer may bedisposed at area excluding the bending region BA.

Because the cushion layer CSL and the second adhesive layer AD2 may notbe disposed in the bending region BA, a groove GV may be defined belowthe protective substrate PTS in the bending region BA. Accordingly, thethickness of the display device DD may be reduced in the bending regionBA. For example, the cushion layer CSL and the second adhesive layer AD2may define a groove GV below the protective substrate in the bendingregion BA.

FIG. 3 schematically illustrates an equivalent circuit of a pixelarranged in the pixel layer illustrated in FIG. 2 .

Referring to FIG. 3 , each of the pixels PX may include a light emittingelement OLED and a pixel circuit CC. The pixel circuit CC may includetransistors T1 to T7 and a capacitor CP. The pixel circuit CC maycontrol an amount of current flowing into the light emitting elementOLED in response to a corresponding data voltage of the data voltages.

The light emitting element OLED may emit a light beam at a luminancelevel in correspondence to the amount of current provided from the pixelcircuit CC. To this end, a first voltage ELVDD may be set to be higherthan a second voltage ELVSS.

The transistors T1 to T7 may each include an input electrode (or asource electrode), an output electrode (or a drain electrode), and acontrol electrode (or a gate electrode). In this specification, forconvenience, one of the input electrode and the output electrode may bereferred to as a first electrode, and another as a second electrode.

The first electrode of a first transistor T1 may receive the firstvoltage ELVDD via a fifth transistor T5, and the second electrodethereof may be connected to an anode of the light emitting element OLEDvia a sixth transistor T6. The first transistor T1 may be defined as adrive transistor. The first transistor T1 may control the amount ofcurrent flowing into the light emitting element OLED, depending on avoltage applied to the control electrode of the first transistor T1.

A second transistor T2 may be connected between a corresponding dataline DL of the data lines DL1 to DLn and the first electrode of thefirst transistor T1, and the control electrode of the second transistorT2 may be connected to an ith scan line SLi. The second transistor T2may be turned on in case that an ith scan signal Si may be providedthereto through the ith scan line SLi, so that the second transistor T2may electrically connect the data line DL to the first electrode of thefirst transistor T1.

A third transistor T3 may be connected between the second electrode andthe control electrode of the first transistor T1. The control electrodeof the third transistor T3 may be connected to the ith scan line SLi.The third transistor T3 may be turned on in case that the ith scansignal Si may be provided thereto through the ith scan line SLi, so thatthe third transistor T3 may electrically connect the second electrodeand the control electrode of the first transistor T1. The firsttransistor T1 may be connected in the form of a diode in case that thethird transistor T3 may be turned on.

A fourth transistor T4 may be connected between a node ND and aninitialization power generator (not illustrated). The control electrodeof the fourth transistor T4 may be connected to an (i−1)th scan lineSLi−1. The fourth transistor T4 may be turned on in case that an (i−1)thscan signal Si−1 may be provided thereto through the (i−1)th scan lineSLi−1, so that the fourth transistor T4 may provide an initializationvoltage Vint to the node ND.

The fifth transistor T5 may be connected between a power line PL and thefirst electrode of the first transistor T1. The control electrode of thefifth transistor T5 may be connected to an ith light emission line ELi.

The sixth transistor T6 may be connected between the second electrode ofthe first transistor T1 and the anode of the light emitting elementOLED. The control electrode of the sixth transistor T6 may be connectedto the ith light emission line ELi.

A seventh transistor T7 may be connected between the initializationpower generator (not illustrated) and the anode of the light emittingelement OLED. The control electrode of the seventh transistor T7 may beconnected to an (i+1)th scan line SLi+1. The seventh transistor T7 maybe turned on in case that an (i+1)th scan signal Si+1 is providedthereto through the (i+1)th scan line SLi+1, so that the seventhtransistor T7 may provide the initialization voltage Vint to the anodeof the light emitting element OLED.

The capacitor CP may be disposed between the power line PL and the nodeND. The capacitor CP may store the data voltage. In case that the fifthtransistor T5 and the sixth transistor T6 may be turned on, the amountof current flowing in the first transistor T1 may be determineddepending on the voltage stored in the capacitor CP.

Although the transistors T1 to T7 are illustrated on the basis of PMOSin FIG. 3 , an embodiment of the disclosure is not limited thereto andthe transistors T1 to T7 may be configured on the basis of NMOS inanother embodiment of the disclosure.

FIG. 4 is a schematic cross-sectional view of a portion corresponding tothe light emitting element illustrated in FIG. 3 .

Referring to FIG. 4 , the pixel PX may include the light emittingelement OLED and a transistor TR connected to the light emitting elementOLED. The light emitting element OLED may include a first electrode E1,a second electrode E2, and an organic light emitting layer OEL disposedbetween the first electrode E1 and the second electrode E2. Thetransistor TR may be the sixth transistor T6 illustrated in FIG. 3 . Thelight emitting element OLED may be defined as an organic light emittingelement.

The first electrode E1 may be the anode, and the second electrode E2 maybe a cathode. The first electrode E1 may be defined as a pixelelectrode, and the second electrode E2 may be defined as a commonelectrode.

The pixel PX may be divided into a pixel region PA and a non-pixelregion NPA around the pixel region PA. The light emitting element OLEDmay be disposed in the pixel region PA, and the transistor TR may bedisposed in the non-pixel region NPA.

The transistor TR and the light emitting element OLED may be disposed onthe substrate SUB. A buffer layer BFL may be disposed on the substrateSUB and the buffer layer BFL may include an inorganic material.

A semiconductor layer SM of the transistor TR may be disposed on thebuffer layer BFL. The semiconductor layer SM may include a semiconductorof an inorganic material such as amorphous silicon and polycrystallinesilicon, or an organic semiconductor. The semiconductor layer SM mayinclude an oxide semiconductor. Although not illustrated in FIG. 4 , asource region, a drain region, and a channel region between the sourceregion and the drain region may be included in the semiconductor layerSM.

A first insulating layer INS1 may be disposed on the buffer layer BFL soas to cover the semiconductor layer SM. The first insulating layer INS1may include an inorganic material. A gate electrode GE of the transistorTR overlapping the semiconductor layer SM may be disposed on the firstinsulating layer INS1. The gate electrode GE may be disposed so as tooverlap the channel region of the semiconductor layer SM.

A second insulating layer INS2 may be disposed on the first insulatinglayer INS1 so as to cover the gate electrode GE. The second insulatinglayer INS2 may include an organic material and/or an inorganic material.

A source electrode SE and a drain electrode DE of the transistor TR maybe disposed to be spaced apart from each other on the second insulatinglayer INS2. The source electrode SE may be connected to the sourceregion of the semiconductor layer SM through a first contact hole CH1defined in the first insulating layer INS1 and the second insulatinglayer INS2. The drain electrode DE may be connected to the drain regionof the semiconductor layer SM through a second contact hole CH2 definedin the first insulating layer INS1 and the second insulating layer INS2.

A third insulating layer INS3 may be disposed on the second insulatinglayer INS2 so as to cover the source electrode SE and the drainelectrode DE of the transistor TR. The third insulating layer INS3 maybe defined as a planarizing film for providing a flat upper surface, andmay include an organic material.

The first electrode E1 may be disposed on the third insulating layerINS3. The first electrode E1 may be connected to the drain electrode DEof the transistor TR through a third contact hole CH3 defined in thethird insulating layer INS3.

A pixel defining film PDL exposing a portion of the first electrode E1may be disposed on the first electrode E1 and the third insulating layerINS3. An opening PX_OP for exposing the portion of the first electrodeE1 may be defined in the pixel defining film PDL.

The organic light emitting layer OEL may be disposed on the firstelectrode E1 in the opening PX_OP. The organic light emitting layer OELmay generate light of color. For example, the organic light emittinglayer OEL may emit any one of red light, green light, and blue light.However, the organic light emitting layer OEL is not limited thereto andmay also generate white light by a combination of organic materials thatgenerate red light, green light, and blue light.

The second electrode E2 may be disposed on the pixel defining film PDLand the organic light emitting layer OEL. The thin film encapsulationlayer TFE may be disposed on the light emitting element OLED so as tocover the pixel PX. The layer between the substrate SUB and the thinfilm encapsulation layer TFE may be defined as the pixel layer PXL.

The first voltage ELVDD may be applied to the first electrode E1, andthe second voltage ELVSS may be applied to the second electrode E2. Ahole and an electron injected into the organic light emitting layer OELmay combine with each other to generate an exciton, and the lightemitting element OLED may emit light while the exciton transitions to aground state. The light emitting element OLED emits red light, greenlight, and blue light according to a current flow, and thus an image maybe displayed.

FIG. 5 schematically illustrates a bent state of the bending regionillustrated in FIG. 2 .

Referring to FIG. 5 , the bending region BA may be bent toward the lowerportion of the display panel DP. The substrate SUB may be bent at thebending region BA such that the first region A1 may overlap the secondregion A2. For example, the first region A1 may be disposed below thesecond region A2. Accordingly, the drive chip DDV may be disposed belowthe display panel DP. Because the first region A1 may be disposed belowa rear surface of the second region A2, the bezel region of the displaypanel DP may be minimized when viewed in a plane.

Because the protective substrate PTS may have a thickness smaller thanthose of the substrate SUB and the cushion layer CSL, the thickness ofthe display panel DP may be reduced. The protective substrate PTS mayinclude a polyimide having a modulus smaller than that of polyethyleneterephthalate, and thus the protective substrate PTS may be easily bentin the bending region BA. Because the cushion layer CSL may not bedisposed in the bending region BA, the thickness of the display deviceDD may be reduced in the bending region BA, and thus the substrate SUBmay be more easily bent at the bending region BA.

As a result, according to an embodiment of the disclosure, the substrateSUB may be more easily bent at the bending region BA of the displaypanel DP, and the thickness of the display panel DP may be reduced.

FIG. 6 schematically illustrates a carrier panel according to anembodiment of the disclosure.

For ease of description, FIG. 6 illustrates a cross sectioncorresponding to FIG. 2 .

Referring to FIG. 6 , a carrier panel CDP may include the display panelDP and a carrier film CFM disposed below the display panel DP. Inmanufacturing the display device DD, the carrier film CFM for protectingthe lower portion of the display panel DP may be used in case that thedisplay panel DP may be transferred to a process chamber. For example,the carrier film CFM may be disposed below the display panel DP andattached to the lower portion of the display panel DP.

A dummy adhesive layer DAD may be disposed between the protectivesubstrate PTS and the carrier film CFM, and the carrier film CFM may beattached to the protective substrate PTS by the dummy adhesive layerDAD. The dummy adhesive layer DAD may have weaker adhesion than thefirst adhesive layer AD1.

The components of the display panel DP have been described above indetail, and thus a description thereof will be omitted.

As described above, because the protective substrate PTS including apolyimide having a small thickness and a low modulus may be disposedbelow the substrate SUB, the substrate SUB may be more easily bent atthe bending region BA of the display panel DP, and the thickness of thedisplay panel DP may be reduced.

FIGS. 7 and 8 are schematic views for describing a manufacturing processof the display device using the carrier panel illustrated in FIG. 6 .

Referring to FIG. 7 , in a manufacturing process of the display deviceDD, the carrier film CFM may be detached from the display panel DP. Forexample, the dummy adhesive layer DAD and the carrier film CFM may bedetached from the protective substrate PTS. Because the dummy adhesivelayer DAD may have weaker adhesion than the first adhesive layer AD1,the dummy adhesive layer DAD and the carrier film CFM may be easilydetached from the protective substrate PTS.

In the case that the dummy adhesive layer DAD may have stronger adhesionthan the first adhesive layer AD1, the protective substrate PTS attachedto the dummy adhesive layer DAD may be detached from the substrate SUBtogether with the carrier film CFM in case that the carrier film CFM maybe detached from the display panel DP. Because the protective substratePTS may be attached to the dummy adhesive layer DAD having strongeradhesion, the protective substrate PTS may be detached from thesubstrate SUB together with the carrier film CFM.

However, because the dummy adhesive layer DAD may have weaker adhesionthan the first adhesive layer AD1 in an embodiment of the disclosure,the protective substrate PTS may not be detached in case that thecarrier film CFM may be detached.

Referring to FIG. 8 , the cushion layer CSL may be attached to theprotective substrate PTS by the second adhesive layer AD2 after thecarrier film CFM may be detached. Although not illustrated, the inputsensing part ISP may be disposed on the thin film encapsulation layerTFE and the window WIN may be disposed on the input sensing part ISP tomanufacture the display device DD.

FIG. 9 is a schematic cross-sectional view of a display device accordingto another embodiment of the disclosure. FIG. 10 schematicallyillustrates a bent state of the substrate SUB at the bending regionillustrated in FIG. 9 .

Cross sections illustrated in FIGS. 9 and 10 may respectively correspondto cross sections illustrated in FIGS. 2 and 5 , and a description of adisplay device DD′ illustrated in FIGS. 9 and 10 will be given belowfocusing on components different from those of the display device DDillustrated in FIGS. 2 and 5 . FIGS. 9 and 10 illustrate like componentsthat FIGS. 2 and 5 illustrate using similar or the same referencenumerals.

A protective substrate PTS' and the protective substrate PTS may differ.A display panel DP′, the input sensing part ISP, and the window WINillustrated in FIGS. 9 and 10 may be similar or the same as the displaypanel DP, the input sensing part ISP, and the window WIN illustrated inFIGS. 2 and 5 .

Referring to FIG. 9 , the protective substrate PTS' may be disposedbelow the substrate SUB in the first region A1. A first adhesive layerAD1′ may be disposed between the substrate SUB and the protectivesubstrate PTS' in the first region A1. The protective substrate PTS' maybe attached to the substrate SUB by the first adhesive layer AD1′ in thefirst region A1. The protective substrate PTS' may not be disposed inthe bending region BA and the second region A2. The first adhesive layerAD1′ may not be disposed in the bending region BA and the second regionA2.

The cushion layer CSL may be disposed below the protective substratePTS' in the first region A1 and the substrate SUB in the second regionA2. The cushion layer CSL may not be disposed in the bending region BA.

The second adhesive layer AD2 may be disposed between the protectivesubstrate PTS' and the cushion layer CSL in the first region A1, andbetween the substrate SUB and the cushion layer CSL in the second regionA2. The cushion layer CSL may be attached by the second adhesive layerAD2 to the protective substrate PTS' in the first region A1 and to thesubstrate SUB in the second region A2. The second adhesive layer AD2 maynot be disposed in the bending region BA. The cushion layer CSL and thesecond adhesive layer AD2 may define a groove GV′ below the substrate inthe bending region BA.

The protective substrate PTS' may include a colored polyimide similarlyto the protective substrate PTS illustrated in FIG. 2 , and may have athickness smaller than those of the substrate SUB and the cushion layerCSL.

Referring to FIG. 10 , the substrate SUB may be bent at the bendingregion BA toward a lower portion of the display panel DP′, and thus thefirst region A1 may overlap the second region A2. For example, the firstregion A1 may be disposed below the second region A2. Because theprotective substrate PTS' may have a thickness smaller than those of thesubstrate SUB and the cushion layer CSL, the thickness of the displaypanel DP′ may be reduced. Because the protective substrate PTS' may notbe disposed below the substrate SUB in the second region A2, thethickness of the display panel DP′ may further be reduced.

Because the protective substrate PTS' may include a polyimide, theprotective substrate PTS' may be easily bent in the bending region BA.Because the cushion layer CSL and the protective substrate PTS' may notbe disposed in the bending region BA, the thickness of the displaydevice DD′ may become smaller in the bending region BA, and thus thesubstrate may be more easily bent at the bending region BA.

FIG. 11 schematically illustrates a carrier panel according to anotherembodiment of the disclosure.

For ease of description, FIG. 11 illustrates a cross sectioncorresponding to FIG. 9 .

Referring to FIG. 11 , a carrier panel CDP′ may include the displaypanel DP′ and the carrier film CFM disposed below the display panel DP′.The carrier film CFM may be attached to the lower portion of the displaypanel DP′.

In the first region A1, a dummy adhesive layer DAD′ may be disposedbetween the protective substrate PTS' and the carrier film CFM. Thedummy adhesive layer DAD′ may be disposed between the substrate SUB andthe carrier film CFM in the second region A2 and between the substrateSUB and the carrier film CFM in the bending region BA.

In the bending region BA and the second region A2, the protectivesubstrate PTS' and the first adhesive layer AD1′ may not be disposed,and the dummy adhesive layer DAD′ may be disposed. The thickness of aportion of the dummy adhesive layer DAD′ disposed in the bending regionBA and the second region A2 may be greater than the thickness of anotherportion of the dummy adhesive layer DAD′ disposed in the first regionA1.

The carrier film CFM may be attached to the protective substrate PTS'and the substrate SUB by the dummy adhesive layer DAD′. The dummyadhesive layer DAD′ may have weaker adhesion than the first adhesivelayer AD1′.

FIGS. 12 and 13 are schematic views for describing a manufacturingprocess of the display device using the carrier panel illustrated inFIG. 11 .

Referring to FIG. 12 , in a manufacturing process of the display deviceDD′, the carrier film CFM may be detached from the display panel DP′.For example, the dummy adhesive layer DAD′ and the carrier film CFM maybe detached from the substrate SUB and the protective substrate PTS′.Because the dummy adhesive layer DAD′ may have weaker adhesion, thedummy adhesive layer DAD′ and the carrier film CFM may be easilydetached from the substrate SUB and the protective substrate PTS′.

Referring to FIG. 13 , after the carrier film CFM may be detached, thecushion layer CSL may be attached by the second adhesive layer AD2 tothe protective substrate PTS' disposed in the first region A1 and to thesubstrate SUB in the second region A2. Although not illustrated, theinput sensing part ISP may be disposed on the thin film encapsulationlayer TFE and the window WIN may be disposed on the input sensing partISP to manufacture the display device DD′.

According to an embodiment of the disclosure, because the protectivesubstrate including a polyimide having a small thickness and a lowmodulus may be disposed below the substrate, the bending region of thedisplay panel may be more easily bent and the thickness of the displaypanel may be reduced.

The embodiments described herein are not intended to limit the technicalspirit and scope of the invention. Rather, while embodiments of thedisclosure have been described herein, it is understood that variouschanges and modifications can be made by those skilled in the art. Theembodiments, including those incorporating such changes andmodifications, should be considered to be within the scope of theinvention as defined by the following claims including any equivalents.

What is claimed is:
 1. A carrier panel comprising: a substrate includinga first region, a second region, and a bending region between the firstregion and the second region; a pixel layer disposed on the substrate; aprotective substrate disposed below the substrate; a first adhesivelayer disposed between the substrate and the protective substrate; acarrier film disposed below the protective substrate; and a dummyadhesive layer disposed between the protective substrate and the carrierfilm, wherein an adhesion of the dummy adhesive layer is weaker than anadhesion of the first adhesive layer, and the protective substrate has athickness smaller than a thicknesses of each of the substrate and thecarrier film.